Select the next microcode word to execute. More...
Always Constructs | |
ALWAYS_33 | ( clock , reset_n ) |
ALWAYS_34 | ( clock , reset_n ) |
Inputs | |
clock | |
reset_n | |
movem_loop | [4:0] |
movem_reg | [15:0] |
operand2 | [31:0] |
alu_signal | |
alu_mult_div_ready | |
condition | |
result | [31:0] |
overflow | |
stop_flag | |
ir | [15:0] |
decoder_trap | [7:0] |
trace_flag | |
group_0_flag | |
interrupt_mask | [2:0] |
load_ea | [8:0] |
perform_ea_read | [8:0] |
perform_ea_write | [8:0] |
save_ea | [8:0] |
decoder_micropc | [8:0] |
prefetch_ir_valid_32 | |
prefetch_ir_valid | |
jmp_address_trap | |
jmp_bus_trap | |
finished | |
branch_control | [3:0] |
branch_offset | [3:0] |
Outputs | |
micro_pc | [8:0] |
Signals | |
reg[8:0] | micro_pc_0 |
reg[8:0] | micro_pc_1 |
reg[8:0] | micro_pc_2 |
reg[8:0] | micro_pc_3 |
Select the next microcode word to execute.
The microcode_branch module is responsible for selecting the next microcode word to execute. This decision is based on the value of the current microcode word, the value of the interrupt privilege level, the state of the current bus cycle and other internal signals.
The microcode_branch module implements a simple stack for the microcode addresses. This makes it possible to call subroutines inside the microcode.
Definition at line 3344 of file ao68000.v.
Definition at line 3427 of file ao68000.v.
03427 always @(posedge clock or negedge reset_n) begin 03428 if(reset_n == 1'b0) micro_pc_0 <= 9'd0; 03429 else micro_pc_0 <= micro_pc; 03430 end
Definition at line 3432 of file ao68000.v.
03432 always @(posedge clock or negedge reset_n) begin 03433 if(reset_n == 1'b0) begin 03434 micro_pc_1 <= 9'd0; 03435 micro_pc_2 <= 9'd0; 03436 micro_pc_3 <= 9'd0; 03437 end 03438 else if(branch_control == `BRANCH_stop_flag_wait_ir_decode && prefetch_ir_valid == 1'b1 && decoder_trap == 8'd0) 03439 begin 03440 micro_pc_1 <= micro_pc_0 + { 5'd0, branch_offset }; 03441 micro_pc_2 <= micro_pc_1; 03442 micro_pc_3 <= micro_pc_2; 03443 end 03444 else if(branch_control == `BRANCH_procedure) begin 03445 if(branch_offset == `PROCEDURE_call_read && load_ea != 9'd0) begin 03446 micro_pc_1 <= perform_ea_read; 03447 micro_pc_2 <= micro_pc_0 + 9'd1; 03448 micro_pc_3 <= micro_pc_1; 03449 end 03450 else if(branch_offset == `PROCEDURE_call_read && load_ea == 9'd0) begin 03451 micro_pc_1 <= micro_pc_0 + 9'd1; 03452 micro_pc_2 <= micro_pc_1; 03453 micro_pc_3 <= micro_pc_2; 03454 end 03455 else if(branch_offset == `PROCEDURE_call_write && save_ea != 9'd0) begin 03456 micro_pc_1 <= save_ea; 03457 micro_pc_2 <= micro_pc_1; 03458 micro_pc_3 <= micro_pc_2; 03459 end 03460 else if((branch_offset == `PROCEDURE_call_load_ea && load_ea != 9'd0) || 03461 (branch_offset == `PROCEDURE_call_perform_ea_read) || 03462 (branch_offset == `PROCEDURE_call_perform_ea_write) || 03463 (branch_offset == `PROCEDURE_call_save_ea && save_ea != 9'd0) || 03464 (branch_offset == `PROCEDURE_call_trap) ) 03465 begin 03466 micro_pc_1 <= micro_pc_0 + 9'd1; 03467 micro_pc_2 <= micro_pc_1; 03468 micro_pc_3 <= micro_pc_2; 03469 end 03470 else if(branch_offset == `PROCEDURE_return) begin 03471 micro_pc_1 <= micro_pc_2; 03472 micro_pc_2 <= micro_pc_3; 03473 micro_pc_3 <= 9'd0; 03474 end 03475 else if(branch_offset == `PROCEDURE_push_micropc) begin 03476 micro_pc_1 <= micro_pc_0; 03477 micro_pc_2 <= micro_pc_1; 03478 micro_pc_3 <= micro_pc_2; 03479 end 03480 else if(branch_offset == `PROCEDURE_pop_micropc) begin 03481 micro_pc_1 <= micro_pc_2; 03482 micro_pc_2 <= micro_pc_3; 03483 micro_pc_3 <= 9'd0; 03484 end 03485 end 03486 end
movem_loop [4:0] [Input] |
alu_signal [Input] |
alu_mult_div_ready [Input] |
decoder_trap [7:0] [Input] |
trace_flag [Input] |
group_0_flag [Input] |
interrupt_mask [2:0] [Input] |
perform_ea_read [8:0] [Input] |
perform_ea_write [8:0] [Input] |
decoder_micropc [8:0] [Input] |
prefetch_ir_valid_32 [Input] |
prefetch_ir_valid [Input] |
jmp_address_trap [Input] |
jmp_bus_trap [Input] |
branch_control [3:0] [Input] |
branch_offset [3:0] [Input] |
micro_pc_0 [reg[8:0]] |
micro_pc_1 [reg[8:0]] |
micro_pc_2 [reg[8:0]] |
micro_pc_3 [reg[8:0]] |