This is the complete list of members for
ao68000, including all inherited members.
CLK_I | ao68000 | [Input] |
saved_pc_change | bus_control | [Signal] |
S_INIT | bus_control | [Parameter] |
S_RESET | bus_control | [Parameter] |
S_BLOCKED | bus_control | [Parameter] |
S_INT_1 | bus_control | [Parameter] |
S_READ_1 | bus_control | [Parameter] |
S_READ_2 | bus_control | [Parameter] |
S_READ_3 | bus_control | [Parameter] |
S_WAIT | bus_control | [Parameter] |
S_WRITE_1 | bus_control | [Parameter] |
ERR_I | ao68000 | [Input] |
S_WRITE_2 | bus_control | [Parameter] |
S_WRITE_3 | bus_control | [Parameter] |
S_PC_0 | bus_control | [Parameter] |
S_PC_1 | bus_control | [Parameter] |
S_PC_2 | bus_control | [Parameter] |
S_PC_3 | bus_control | [Parameter] |
S_PC_4 | bus_control | [Parameter] |
S_PC_5 | bus_control | [Parameter] |
S_PC_6 | bus_control | [Parameter] |
FC_USER_DATA | bus_control | [Parameter] |
RTY_I | ao68000 | [Input] |
FC_USER_PROGRAM | bus_control | [Parameter] |
FC_SUPERVISOR_DATA | bus_control | [Parameter] |
FC_SUPERVISOR_PROGRAM | bus_control | [Parameter] |
FC_CPU_SPACE | bus_control | [Parameter] |
CTI_CLASSIC_CYCLE | bus_control | [Parameter] |
CTI_CONST_CYCLE | bus_control | [Parameter] |
CTI_INCR_CYCLE | bus_control | [Parameter] |
CTI_END_OF_BURST | bus_control | [Parameter] |
VECTOR_BUS_TRAP | bus_control | [Parameter] |
VECTOR_ADDRESS_TRAP | bus_control | [Parameter] |
SGL_O | ao68000 | [Output] |
current_state | bus_control | [Signal] |
reset_counter | bus_control | [Signal] |
last_interrupt_mask | bus_control | [Signal] |
clock | registers | [Input] |
reset_n | registers | [Input] |
data_read | registers | [Input] |
prefetch_ir | registers | [Input] |
prefetch_ir_valid | registers | [Input] |
result | registers | [Input] |
sr | registers | [Input] |
BLK_O | ao68000 | [Output] |
rw_state | registers | [Input] |
fc_state | registers | [Input] |
fault_address_state | registers | [Input] |
interrupt_trap | registers | [Input] |
interrupt_mask | registers | [Input] |
decoder_trap | registers | [Input] |
usp | registers | [Input] |
Dn_output | registers | [Input] |
An_output | registers | [Input] |
pc_change | registers | [Output] |
RMW_O | ao68000 | [Output] |
ea_reg | registers | [Output] |
ea_reg_control | registers | [Input] |
ea_mod | registers | [Output] |
ea_mod_control | registers | [Input] |
ea_type | registers | [Output] |
ea_type_control | registers | [Input] |
operand1 | registers | [Output] |
pc_valid | registers | [Signal] |
clock | memory_registers | [Input] |
reset_n | memory_registers | [Input] |
CTI_O | ao68000 | [Output] |
An_address | memory_registers | [Input] |
An_input | memory_registers | [Input] |
An_write_enable | memory_registers | [Input] |
An_output | memory_registers | [Output] |
usp | memory_registers | [Output] |
Dn_address | memory_registers | [Input] |
Dn_input | memory_registers | [Input] |
Dn_write_enable | memory_registers | [Input] |
Dn_size | memory_registers | [Input] |
Dn_output | memory_registers | [Output] |
BTE_O | ao68000 | [Output] |
micro_pc | memory_registers | [Input] |
micro_data | memory_registers | [Output] |
An_ram_write_enable | memory_registers | [Signal] |
An_ram_output | memory_registers | [Signal] |
dn_byteena | memory_registers | [Signal] |
clock | decoder | [Input] |
reset_n | decoder | [Input] |
supervisor | decoder | [Input] |
ir | decoder | [Input] |
decoder_trap | decoder | [Output] |
fc_o | ao68000 | [Output] |
decoder_micropc | decoder | [Output] |
decoder_alu | decoder | [Output] |
save_ea | decoder | [Output] |
perform_ea_write | decoder | [Output] |
perform_ea_read | decoder | [Output] |
load_ea | decoder | [Output] |
ea_type | decoder | [Input] |
ea_mod | decoder | [Input] |
ea_reg | decoder | [Input] |
NO_TRAP | decoder | [Parameter] |
ipl_i | ao68000 | [Input] |
ILLEGAL_INSTRUCTION_TRAP | decoder | [Parameter] |
PRIVILEGE_VIOLATION_TRAP | decoder | [Parameter] |
ILLEGAL_1010_INSTRUCTION_TRAP | decoder | [Parameter] |
ILLEGAL_1111_INSTRUCTION_TRAP | decoder | [Parameter] |
UNUSED_MICROPC | decoder | [Parameter] |
cond | condition | [Input] |
ccr | condition | [Input] |
condition | condition | [Output] |
C | condition | [Signal] |
V | condition | [Signal] |
reset_o | ao68000 | [Output] |
reset_n | ao68000 | [Input] |
Z | condition | [Signal] |
N | condition | [Signal] |
clock | alu | [Input] |
reset_n | alu | [Input] |
address | alu | [Input] |
ir | alu | [Input] |
size | alu | [Input] |
operand1 | alu | [Input] |
operand2 | alu | [Input] |
interrupt_mask | alu | [Input] |
blocked_o | ao68000 | [Output] |
alu_control | alu | [Input] |
sr | alu | [Output] |
result | alu | [Output] |
alu_signal | alu | [Output] |
alu_mult_div_ready | alu | [Output] |
decoder_alu_reg | alu | [Input] |
mult_div_sign | alu | [Signal] |
div_count | alu | [Signal] |
quotient | alu | [Signal] |
dividend | alu | [Signal] |
sr | ao68000 | [Signal] |
divider | alu | [Signal] |
div_diff | alu | [Signal] |
div_overflow | alu | [Signal] |
div_quotient | alu | [Signal] |
div_remainder | alu | [Signal] |
mult_result | alu | [Signal] |
interrupt_mask_copy | alu | [Signal] |
was_interrupt | alu | [Signal] |
lbit | alu | [Signal] |
rbit | alu | [Signal] |
size | ao68000 | [Signal] |
clock | microcode_branch | [Input] |
reset_n | microcode_branch | [Input] |
movem_loop | microcode_branch | [Input] |
movem_reg | microcode_branch | [Input] |
operand2 | microcode_branch | [Input] |
alu_signal | microcode_branch | [Input] |
alu_mult_div_ready | microcode_branch | [Input] |
condition | microcode_branch | [Input] |
result | microcode_branch | [Input] |
overflow | microcode_branch | [Input] |
address | ao68000 | [Signal] |
stop_flag | microcode_branch | [Input] |
ir | microcode_branch | [Input] |
decoder_trap | microcode_branch | [Input] |
trace_flag | microcode_branch | [Input] |
group_0_flag | microcode_branch | [Input] |
interrupt_mask | microcode_branch | [Input] |
load_ea | microcode_branch | [Input] |
perform_ea_read | microcode_branch | [Input] |
perform_ea_write | microcode_branch | [Input] |
save_ea | microcode_branch | [Input] |
address_type | ao68000 | [Signal] |
decoder_micropc | microcode_branch | [Input] |
prefetch_ir_valid_32 | microcode_branch | [Input] |
prefetch_ir_valid | microcode_branch | [Input] |
jmp_address_trap | microcode_branch | [Input] |
jmp_bus_trap | microcode_branch | [Input] |
finished | microcode_branch | [Input] |
branch_control | microcode_branch | [Input] |
branch_offset | microcode_branch | [Input] |
micro_pc | microcode_branch | [Output] |
micro_pc_0 | microcode_branch | [Signal] |
read_modify_write_flag | ao68000 | [Signal] |
micro_pc_1 | microcode_branch | [Signal] |
micro_pc_2 | microcode_branch | [Signal] |
micro_pc_3 | microcode_branch | [Signal] |
data_read | ao68000 | [Signal] |
data_write | ao68000 | [Signal] |
pc | ao68000 | [Signal] |
prefetch_ir_valid | ao68000 | [Signal] |
CYC_O | ao68000 | [Output] |
prefetch_ir | ao68000 | [Signal] |
do_reset | ao68000 | [Signal] |
do_read | ao68000 | [Signal] |
do_write | ao68000 | [Signal] |
do_interrupt | ao68000 | [Signal] |
do_blocked | ao68000 | [Signal] |
jmp_address_trap | ao68000 | [Signal] |
jmp_bus_trap | ao68000 | [Signal] |
finished | ao68000 | [Signal] |
interrupt_trap | ao68000 | [Signal] |
ADR_O | ao68000 | [Output] |
interrupt_mask | ao68000 | [Signal] |
rw_state | ao68000 | [Signal] |
fc_state | ao68000 | [Signal] |
decoder_trap | ao68000 | [Signal] |
usp | ao68000 | [Signal] |
Dn_output | ao68000 | [Signal] |
An_output | ao68000 | [Signal] |
result | ao68000 | [Signal] |
An_address | ao68000 | [Signal] |
An_input | ao68000 | [Signal] |
DAT_O | ao68000 | [Output] |
Dn_address | ao68000 | [Signal] |
ir | ao68000 | [Signal] |
decoder_micropc | ao68000 | [Signal] |
alu_signal | ao68000 | [Signal] |
alu_mult_div_ready | ao68000 | [Signal] |
load_ea | ao68000 | [Signal] |
perform_ea_read | ao68000 | [Signal] |
perform_ea_write | ao68000 | [Signal] |
save_ea | ao68000 | [Signal] |
trace_flag | ao68000 | [Signal] |
DAT_I | ao68000 | [Input] |
group_0_flag | ao68000 | [Signal] |
stop_flag | ao68000 | [Signal] |
micro_pc | ao68000 | [Signal] |
operand1 | ao68000 | [Signal] |
operand2 | ao68000 | [Signal] |
movem_loop | ao68000 | [Signal] |
movem_reg | ao68000 | [Signal] |
condition | ao68000 | [Signal] |
micro_data | ao68000 | [Signal] |
fault_address_state | ao68000 | [Signal] |
SEL_O | ao68000 | [Output] |
pc_change | ao68000 | [Signal] |
prefetch_ir_valid_32 | ao68000 | [Signal] |
ea_type | ao68000 | [Signal] |
ea_mod | ao68000 | [Signal] |
ea_reg | ao68000 | [Signal] |
decoder_alu | ao68000 | [Signal] |
decoder_alu_reg | ao68000 | [Signal] |
CLK_I | bus_control | [Input] |
reset_n | bus_control | [Input] |
CYC_O | bus_control | [Output] |
STB_O | ao68000 | [Output] |
ADR_O | bus_control | [Output] |
DAT_O | bus_control | [Output] |
DAT_I | bus_control | [Input] |
SEL_O | bus_control | [Output] |
STB_O | bus_control | [Output] |
WE_O | bus_control | [Output] |
ACK_I | bus_control | [Input] |
ERR_I | bus_control | [Input] |
RTY_I | bus_control | [Input] |
SGL_O | bus_control | [Output] |
WE_O | ao68000 | [Output] |
BLK_O | bus_control | [Output] |
RMW_O | bus_control | [Output] |
CTI_O | bus_control | [Output] |
BTE_O | bus_control | [Output] |
fc_o | bus_control | [Output] |
ipl_i | bus_control | [Input] |
reset_o | bus_control | [Output] |
pc_i_plus_6 | bus_control | [Signal] |
pc_i_plus_4 | bus_control | [Signal] |
address_i_plus_4 | bus_control | [Signal] |
ACK_I | ao68000 | [Input] |
altsyncram | memory_registers | [Module Instance] |
altsyncram | memory_registers | [Module Instance] |
altsyncram | memory_registers | [Module Instance] |
alu | ao68000 | [Module Instance] |
ALWAYS_0CLK_I, reset_n | bus_control | [Always Construct] |
ALWAYS_1CLK_I, reset_n | bus_control | [Always Construct] |
ALWAYS_10clock, reset_n | registers | [Always Construct] |
ALWAYS_11clock, reset_n | registers | [Always Construct] |
ALWAYS_12clock, reset_n | registers | [Always Construct] |
ALWAYS_13clock, reset_n | registers | [Always Construct] |
ALWAYS_14clock, reset_n | registers | [Always Construct] |
ALWAYS_15clock, reset_n | registers | [Always Construct] |
ALWAYS_16clock, reset_n | registers | [Always Construct] |
ALWAYS_17clock, reset_n | registers | [Always Construct] |
ALWAYS_18clock, reset_n | registers | [Always Construct] |
ALWAYS_19clock, reset_n | registers | [Always Construct] |
ALWAYS_2clock, reset_n | registers | [Always Construct] |
ALWAYS_20clock, reset_n | registers | [Always Construct] |
ALWAYS_21clock, reset_n | registers | [Always Construct] |
ALWAYS_22clock, reset_n | registers | [Always Construct] |
ALWAYS_23clock, reset_n | registers | [Always Construct] |
ALWAYS_24clock, reset_n | registers | [Always Construct] |
ALWAYS_25clock, reset_n | registers | [Always Construct] |
ALWAYS_26clock, reset_n | registers | [Always Construct] |
ALWAYS_27clock, reset_n | registers | [Always Construct] |
ALWAYS_28clock, reset_n | registers | [Always Construct] |
ALWAYS_29clock, reset_n | registers | [Always Construct] |
ALWAYS_3clock, reset_n | registers | [Always Construct] |
ALWAYS_30clock, reset_n | memory_registers | [Always Construct] |
ALWAYS_31clock, reset_n | alu | [Always Construct] |
ALWAYS_32clock, reset_n | alu | [Always Construct] |
ALWAYS_33clock, reset_n | microcode_branch | [Always Construct] |
ALWAYS_34clock, reset_n | microcode_branch | [Always Construct] |
ALWAYS_4clock, reset_n | registers | [Always Construct] |
ALWAYS_5clock, reset_n | registers | [Always Construct] |
ALWAYS_6clock, reset_n | registers | [Always Construct] |
ALWAYS_7clock, reset_n | registers | [Always Construct] |
ALWAYS_8clock, reset_n | registers | [Always Construct] |
ALWAYS_9clock, reset_n | registers | [Always Construct] |
bus_control | ao68000 | [Module Instance] |
condition | ao68000 | [Module Instance] |
decoder | ao68000 | [Module Instance] |
Dm | alu | [Define] |
lpm_mult | alu | [Module Instance] |
memory_registers | ao68000 | [Module Instance] |
microcode_branch | ao68000 | [Module Instance] |
registers | ao68000 | [Module Instance] |
Rm | alu | [Define] |
Sm | alu | [Define] |
Z | alu | [Define] |